MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 402
MC68HC908AP16CFA
Manufacturer Part Number
MC68HC908AP16CFA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AP16CFA.pdf
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Low-Voltage Inhibit (LVI)
22.3 Functional Description
Data Sheet
402
$FE0F
Addr.
Register Name
LVI Status Register
(LVISR)
Figure 22-2
out of reset. The LVI module contains independent bandgap reference
circuit and comparator for monitoring the V
voltage. An LVI reset performs a MCU internal reset and drives the RST
pin low to provide low-voltage protection to external peripheral devices.
LVISTOP, LVIPWRD, LVIRSTD, and LVIREGD are in the CONFIG1
register. See
(CONFIG & MOR)
reset occurs, the MCU remains in reset until V
and V
output of the comparator controls the state of the LVIOUT flag in the LVI
status register (LVISR).
An LVI reset also drives the RST pin low to provide low-voltage
protection to external peripheral devices.
Reset:
Read: LVIOUT
Write:
Freescale Semiconductor, Inc.
Figure 22-1. LVI I/O Register Summary
For More Information On This Product,
REG
Bit 7
0
rises above V
Go to: www.freescale.com
shows the structure of the LVI module. The LVI is enabled
Section 5. Configuration & Mask Option Registers
= Unimplemented
6
0
0
for details of the LVI configuration bits. Once an LVI
TRIPR2
5
0
0
, which causes the MCU to exit reset. The
4
0
0
MC68HC908AP Family — Rev. 2.5
3
0
0
DD
voltage and the V
DD
rises above V
2
0
0
1
0
0
MOTOROLA
TRIPR1
REG
Bit 0
0
0
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