MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 374

• Manufacturer Part Number: MC68HC908AP16CFA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Input/Output (I/O) Ports
18.4.2 Data Direction Register C (DDRC)
Data Sheet
374
NOTE:
NOTE:
Address:
SCTxD and SCRxD — IrSCI Transmit and Receive Data
Data direction register C determines whether each port C pin is an input
or an output. Writing a logic 1 to a DDRC bit enables the output buffer for
the corresponding port C pin; a logic 0 disables the output buffer.
DDRC[7:0] — Data Direction Register C Bits
Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
Figure 18-11
For those devices packaged in a 42-pin shrink dual in-line package,
PTC0 and PTC1 are not connected. DDRC0 and DDRC1 should be set
to a 1 to configure PTC0 and PTC1 as outputs.
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
The SCTxD and SCRxD pins are IRSCI transmit and receive data
pins. Setting the ENSCI bit in the IRSCI control register 1 (IRSCC1)
configures the PTC6/SCTxD and PTC7/SCRxD pins for IRSCI
function and overrides any control from the port I/O logic.
These read/write bits control port C data direction. Reset clears
DDRC[7:0], configuring all port C pins as inputs.
For More Information On This Product,
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
DDRC7
$0006
Bit 7
Figure 18-10. Data Direction Register C (DDRC)
0
Go to: www.freescale.com
shows the port C I/O logic.
DDRC6
6
0
DDRC5
5
0
DDRC4
4
0
DDRC3
MC68HC908AP Family — Rev. 2.5
3
0
DDRC2
2
0
DDRC1
1
0
MOTOROLA
DDRC0
Bit 0
0