MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 283

• Manufacturer Part Number: MC68HC908AP16CFA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

14.10.5 IRSCI Status Register 2
MC68HC908AP Family — Rev. 2.5
MOTOROLA
Address:
IRSCI status register 2 contains flags to signal the following conditions:
BKF — Break Flag Bit
RPF — Reception in Progress Flag Bit
Reset:
Read:
Write:
•
•
This clearable, read-only bit is set when the SCI detects a break
character on the RxD pin. In IRSCS1, the FE and SCRF bits are also
set. In 9-bit character transmissions, the R8 bit in IRSCC3 is cleared.
BKF does not generate a CPU interrupt request. Clear BKF by
reading IRSCS2 with BKF set and then reading the IRSCDR. Once
cleared, BKF can become set again only after logic 1s again appear
on the RxD pin followed by another break character. Reset clears the
BKF bit.
This read-only bit is set when the receiver detects a logic 0 during the
RT1 time period of the start bit search. RPF does not generate an
interrupt request. RPF is reset after the receiver detects false start bits
(usually from noise or a baud rate mismatch) or when the receiver
detects an idle character. Polling RPF before disabling the SCI
module or entering stop mode can show whether a reception is in
progress.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Break character detected
0 = No break character detected
1 = Reception in progress
0 = No reception in progress
Incoming data
Break character detected
$0044
Bit 7
Figure 14-17. IRSCI Status Register 2 (IRSCS2)
0
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= Unimplemented
6
0
Infrared Serial Communications Interface Module (IRSCI)
5
0
4
0
3
0
2
0
BKF
1
0
I/O Registers
Data Sheet
Bit 0
RPF
0
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