MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 377

• Manufacturer Part Number: MC68HC908AP16CFA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

18.5.2 Data Direction Register D (DDRD)
MC68HC908AP Family — Rev. 2.5
MOTOROLA
NOTE:
Address:
Data direction register D determines whether each port D pin is an input
or an output. Writing a logic 1 to a DDRD bit enables the output buffer for
the corresponding port D pin; a logic 0 disables the output buffer.
DDRD[7:0] — Data Direction Register D Bits
Avoid glitches on port D pins by writing to the port D data register before
changing data direction register D bits from 0 to 1.
Figure 18-14
Reset:
Read:
Write:
These read/write bits control port D data direction. Reset clears
DDRD[7:0], configuring all port D pins as inputs.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Corresponding port D pin configured as output
0 = Corresponding port D pin configured as input
READ DDRD ($0007)
WRITE DDRD ($0007)
WRITE PTD ($0003)
READ PTD ($0003)
DDRD7
$0007
Bit 7
Figure 18-13. Data Direction Register D (DDRD)
0
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shows the port D I/O logic.
DDRD6
6
0
Figure 18-14. Port D I/O Circuit
RESET
DDRD5
5
0
DDRD4
DDRDx
PTDx
4
0
DDRD3
3
0
# PTD7–PTD0 have schmitt trigger inputs.
DDRD2
2
0
Input/Output (I/O) Ports
KBIEx
DDRD1
1
0
Data Sheet
DDRD0
Bit 0
Port D
PTDx
0
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