MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 409

• Manufacturer Part Number: MC68HC908AP16CFA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

23.3.1 Flag Protection During Break Interrupts
23.3.2 CPU During Break Interrupts
MC68HC908AP Family — Rev. 2.5
MOTOROLA
Note: Writing a logic 0 clears BW.
$FE0C
$FE0D
$FE0E
Addr.
$FE00
$FE03
SIM Break Status Register
Break Status and Control
SIM Break Flag Control
Register Name
Break Address
Break Address
Register High
Register Low
(BRKSCR)
(SBFCR)
Register
Register
(BRKH)
(SBSR)
(BRKL)
Figure 23-2. Break Module I/O Register Summary
The BCFE bit in the SIM break flag control register (SBFCR) enables
software to clear status bits during the break state.
The CPU starts a break interrupt by:
The break interrupt begins after completion of the CPU instruction in
progress. If the break address register match occurs on the last cycle of
a CPU instruction, the break interrupt begins immediately.
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
•
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Freescale Semiconductor, Inc.
For More Information On This Product,
Loading the instruction register with the SWI instruction
Loading the program counter with $FFFC and $FFFD
($FEFC and $FEFD in monitor mode)
BRKE
BCFE
Bit 15
Bit 7
Bit 7
R
0
0
0
0
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= Unimplemented
BRKA
14
R
R
6
0
6
0
0
13
R
R
5
0
5
0
0
0
12
R
R
R
4
0
4
0
0
0
= Reserved
11
R
R
3
0
3
0
0
0
10
R
R
2
0
2
0
0
0
Functional Description
Break Module (BRK)
SBSW
Note
R
1
0
9
0
1
0
0
0
Data Sheet
Bit 0
Bit 8
Bit 0
R
R
0
0
0
0
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