MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 201
MC68HC908AP16CFA
Manufacturer Part Number
MC68HC908AP16CFA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AP16CFA.pdf
(440 pages)
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MC68HC908AP Family — Rev. 2.5
MOTOROLA
NOTE:
Before changing a channel function by writing to the MSxB or MSxA bit,
set the TSTOP and TRST bits in the TIM status and control register
(TSC).
ELSxB and ELSxA — Edge/Level Select Bits
MSxB:MSxA
When ELSxB:ELSxA = 0:0, this read/write bit selects the initial output
level of the TCHx pin. See
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to an I/O port, and pin TCHx is available as a general-purpose I/O pin.
Table 11-3
ELSxB and ELSxA bits.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Initial output level low
0 = Initial output level high
X0
X1
1X
1X
1X
00
00
00
01
01
01
Table 11-3. Mode, Edge, and Level Selection
Go to: www.freescale.com
shows how ELSxB and ELSxA work. Reset clears the
ELSxB:ELSxA
00
00
01
10
11
01
10
11
01
10
11
Table
buffered PWM
Output preset
Input capture
compare or
compare or
Buffered
Output
output
Mode
PWM
11-3. Reset clears the MSxA bit.
Capture on falling edge only
Capture on rising edge only
Toggle output on compare
Toggle output on compare
Timer Interface Module (TIM)
Clear output on compare
Clear output on compare
Set output on compare
Set output on compare
Pin under port control;
initial output level high
Pin under port control;
initial output level low
Capture on rising or
Configuration
falling edge
I/O Registers
Data Sheet
201
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