MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 43
MC68HC908AP16CFA
Manufacturer Part Number
MC68HC908AP16CFA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AP16CFA.pdf
(440 pages)
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MC68HC908AP Family — Rev. 2.5
MOTOROLA
$003A
$003B
$0032
$0033
$0034
$0035
$0036
$0037
$0038
$0039
Addr.
Timer 2 Channel 1 Status
PLL VCO Range Select
PLL Bandwidth Control
PLL Reference Divider
Register Name
PLL Control Register
and Control Register
PLL Multiplier Select
PLL Multiplier Select
Timer 2 Channel 0
Timer 2 Channel 1
Timer 2 Channel 1
Select Register
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 6 of 12)
Register High
Register High
Register Low
Register Low
Register Low
(T2CH1H)
(T2CH0L)
(T2CH1L)
(T2SC1)
Register
Register
(PBWC)
(PMSH)
(PMRS)
(PMDS)
(PMSL)
(PCTL)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Freescale Semiconductor, Inc.
For More Information On This Product,
X = Indeterminate
PLLIE
AUTO
CH1F
Bit 15
MUL7
VRS7
Bit 7
Bit 7
Bit 7
0
0
0
0
0
0
0
0
0
0
Go to: www.freescale.com
CH1IE
LOCK
MUL6
VRS6
PLLF
14
6
6
0
6
0
0
0
0
1
1
0
0
PLLON
MUL5
VRS5
ACQ
13
5
5
0
0
5
1
0
0
0
0
0
0
0
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
= Unimplemented
MS1A
MUL4
VRS4
BCS
12
4
4
0
4
0
0
0
0
0
0
0
0
0
MUL11
ELS1B
PRE1
MUL3
VRS3
RDS3
11
3
3
0
3
0
0
0
0
0
0
0
MUL10
ELS1A
PRE0
MUL2
VRS2
RDS2
Input/Output (I/O) Section
10
R
2
2
0
2
0
0
0
0
0
0
0
= Reserved
TOV1
VPR1
MUL9
MUL1
VRS1
RDS1
1
1
0
9
1
0
0
0
0
0
0
0
Memory Map
Data Sheet
CH1MAX
VPR0
MUL8
MUL0
VRS0
RDS0
Bit 0
Bit 0
Bit 8
Bit 0
R
0
0
0
0
0
0
1
43
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