MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 265

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MC68HC908AP16CFA

Manufacturer Part Number
MC68HC908AP16CFA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
MC68HC908AP Family — Rev. 2.5
MOTOROLA
As the receiver samples an incoming character, it resynchronizes the RT
clock on any valid falling edge within the character. Resynchronization
within characters corrects misalignments between transmitter bit times
and receiver bit times.
Slow Data Tolerance
Figure 14-10
misaligned without causing a noise error or a framing error. The slow
stop bit begins at RT8 instead of RT1 but arrives in time for the stop bit
data samples at RT8, RT9, and RT10.
For an 8-bit character, data sampling of the stop bit takes the receiver
9 bit times × 16 RT cycles + 10 RT cycles = 154 RT cycles.
With the misaligned character shown in
counts 154 RT cycles at the point when the count of the transmitting
device is 9 bit times × 16 RT cycles + 3 RT cycles = 147 RT cycles.
The maximum percent difference between the receiver count and the
transmitter count of a slow 8-bit character with no errors is
For a 9-bit character, data sampling of the stop bit takes the receiver
10 bit times × 16 RT cycles + 10 RT cycles = 170 RT cycles.
With the misaligned character shown in
counts 170 RT cycles at the point when the count of the transmitting
device is 10 bit times × 16 RT cycles + 3 RT cycles = 163 RT cycles.
RECEIVER
RT CLOCK
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
shows how much a slow received character can be
MSB
154 147
------------------------- -
Figure 14-10. Slow Data
Infrared Serial Communications Interface Module (IRSCI)
154
×
100
SAMPLES
DATA
Figure
Figure
=
4.54%
14-10, the receiver
14-10, the receiver
STOP
SCI Functional Description
Data Sheet
265

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