MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 139
MC68HC908AP16CFA
Manufacturer Part Number
MC68HC908AP16CFA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AP16CFA.pdf
(440 pages)
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9.5 Exception Control
9.5.1 Interrupts
MC68HC908AP Family — Rev. 2.5
MOTOROLA
INTERRUPT
INTERRUPT
MODULE
MODULE
I-BIT
I-BIT
R/W
R/W
IAB
IDB
IAB
IDB
DUMMY
DUMMY
Normal, sequential program execution can be changed in three different
ways:
At the beginning of an interrupt, the CPU saves the CPU register
contents on the stack and sets the interrupt mask (I bit) to prevent
additional interrupts. At the end of an interrupt, the RTI instruction
recovers the CPU register contents from the stack so that normal
processing can resume.
Figure 9-9
SP – 4
•
•
•
Freescale Semiconductor, Inc.
SP
Figure 9-9. Interrupt Recovery Timing
PC – 1[7:0] PC – 1[15:8]
For More Information On This Product,
Figure 9-8. Interrupt Entry Timing
Interrupts:
– Maskable hardware CPU interrupts
– Non-maskable software interrupt instruction (SWI)
Reset
Break interrupts
CCR
SP – 1
SP – 3
shows interrupt recovery timing.
Go to: www.freescale.com
A
SP – 2
SP – 2
X
X
Figure 9-8
SP – 3
SP – 1
PC – 1[15:8] PC – 1[7:0]
A
SP – 4
SP
shows interrupt entry timing, and
CCR
VECT H
PC
V DATA H
OPCODE
System Integration Module (SIM)
VECT L
PC + 1
OPERAND
V DATA L
START ADDR
Exception Control
OPCODE
Data Sheet
139
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