HD643303x Hitachi, HD643303x Datasheet - Page 292

• Manufacturer Part Number: HD643303x
• Description: Hitachi Microcomputer
• Manufacturer: Hitachi

9.2.6 Next Data Register B (NDRB)
NDRB is an 8-bit readable/writable register that stores the next output data for TPC output groups
3 and 2 (pins TP
TPCR occurs, NDRB contents are transferred to the corresponding bits in PBDR. The address of
NDRB differs depending on whether TPC output groups 2 and 3 have the same output trigger or
different output triggers.
NDRB is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Same Trigger for TPC Output Groups 2 and 3: If TPC output groups 2 and 3 are triggered by
the same compare match event, the NDRB address is H'FFA4. The upper 4 bits belong to group 3
and the lower 4 bits to group 2. Address H'FFA6 consists entirely of reserved bits that cannot be
modified and always read 1.
Address H'FFA4
Address H'FFA6
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
15
NDR15
to TP
R/W
—
—
7
0
7
1
Next data 15 to 12
These bits store the next output
data for TPC output group 3
8
). During TPC output, when an ITU compare match event specified in
NDR14
R/W
—
—
6
0
6
1
NDR13
R/W
—
—
5
0
5
1
277
NDR12
Reserved bits
R/W
—
—
4
0
4
1
NDR11
R/W
—
—
3
0
3
1
Next data 11 to 8
These bits store the next output
data for TPC output group 2
NDR10
R/W
—
—
2
0
2
1
NDR9
R/W
—
—
1
0
1
1
NDR8
R/W
—
—
0
0
0
1