HD643303x Hitachi, HD643303x Datasheet - Page 87
HD643303x
Manufacturer Part Number
HD643303x
Description
Hitachi Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD643303X.pdf
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4.5 Stack Status after Exception Handling
Figure 4-5 shows the stack after completion of trap instruction exception handling and interrupt
exception handling.
SP-4
SP-3
SP-2
SP-1
SP (ER7)
SP-4
SP-3
SP-2
SP-1
SP (ER7)
Legend
PCE:
PCH:
PCL:
CCR:
SP:
Notes:
Bits 23 to 16 of program counter (PC)
Bits 15 to 8 of program counter (PC)
Bits 7 to 0 of program counter (PC)
Condition code register
Stack pointer
*
Ignored upon return.
1.
2.
This is the address of the first instruction executed after return.
Saving and restoring of registers must be conducted at even addresses in word-size
or longword-size units.
Before exception handling
Before exception handling
Figure 4-5 Stack after Completion of Exception Handling
Stack area
Stack area
b. Advanced mode
a. Normal mode
Save on stack
Save on stack
SP (ER7)
SP+1
SP+2
SP+3
SP+4
SP (ER7)
SP+1
SP+2
SP+3
SP+4
72
After exception handling
After exception handling
CCR
CCR
CCR
PC
PC
PC
PC
PC
H
L
E
H
L
*
Even address
Even address
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