MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 17

• Manufacturer Part Number: MPC8313CZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Paragraph
Number
10.5.4.4
10.5.4.5
10.5.4.6
10.5.5
10.5.6
11.1
11.1.1
11.2
11.3
11.4
11.4.1
11.4.2
11.4.3
11.4.4
11.4.5
11.5
11.5.1
11.5.1.1
11.5.1.2
11.5.1.3
11.5.2
11.5.3
12.1
12.2
12.3
12.3.1
12.3.2
12.3.3
12.3.4
12.3.5
12.3.5.1
12.3.5.2
12.3.6
Freescale Semiconductor
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Overview........................................................................................................................ 11-1
External Signal Description ........................................................................................... 11-2
Memory Map/Register Definition ................................................................................. 11-2
Register Descriptions ..................................................................................................... 11-3
Functional Description................................................................................................... 11-6
Features .......................................................................................................................... 12-1
Memory Map/Register Definition ................................................................................. 12-2
Register Descriptions ..................................................................................................... 12-3
Interfacing to Fast-Page Mode DRAM Using UPM ............................................... 10-97
Interfacing to ZBT SRAM Using UPM................................................................. 10-102
Features...................................................................................................................... 11-2
PCI Outbound Translation Address Registers (POTARn)......................................... 11-3
PCI Outbound Base Address Registers (POBARn) .................................................. 11-3
PCI Outbound Comparison Mask Registers (POCMRn) .......................................... 11-4
Power Management Control Register (PMCR) ......................................................... 11-5
Discard Timer Control Register (DTCR) .................................................................. 11-6
Transaction Forwarding ............................................................................................. 11-6
PCI Outbound Address Translation ........................................................................... 11-7
Transaction Ordering ................................................................................................. 11-8
Outbound Message Interrupt Status Register (OMISR) ............................................ 12-3
Outbound Message Interrupt Mask Register (OMIMR)............................................ 12-4
Inbound Message Registers (IMR0–IMR1) .............................................................. 12-5
Outbound Message Registers (OMR0–OMR1)......................................................... 12-5
Doorbell Registers ..................................................................................................... 12-6
Inbound Message Interrupt Status Register (IMISR) ................................................ 12-7
NAND Flash Page Read Command Sequence Example ..................................... 10-95
NAND Flash Block Erase Command Sequence Example .................................. 10-96
NAND Flash Program Command Sequence Example ........................................ 10-96
Transactions from the Coherency System Bus (CSB) Port ................................... 11-7
Transactions from the PCI Port ............................................................................. 11-7
Transactions from the DMA Port .......................................................................... 11-7
Outbound Doorbell Register (ODR)...................................................................... 12-6
Inbound Doorbell Register (IDR).......................................................................... 12-7
DMA/Messaging Unit
Contents
Chapter 11
Sequencer
Chapter 12
Title
Number
Page
xvii