MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 395

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MPC8313CZQADDC

Manufacturer Part Number
MPC8313CZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8313CZQADDC

Processor Series
MPC8313
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8313CZQADDC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 9
DDR Memory Controller
9.1
The fully programmable DDR SDRAM controller supports most JEDEC standard x8, x16, or x32 DDR2
and DDR memories available. In addition, unbuffered and registered DRAM modules are supported.
However, mixing different memory types or unbuffered and registered DRAM modules in the same system
is not supported. Dynamic power management and auto-precharge modes simplify memory system design.
A large set of special features support rapid system debug.
Freescale Semiconductor
Introduction
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
In this chapter, the word ‘bank’ refers to a physical bank specified by a chip
select; ‘logical bank’ refers to one of the four or eight sub-banks in each
SDRAM chip. A sub-bank is specified by the 2 or 3 bits on the bank address
(MBA) pins during a memory access.
NOTE
9-1

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