1893AFLF IDT, 1893AFLF Datasheet - Page 107

• Manufacturer Part Number: 1893AFLF
• Description: Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
• Manufacturer: IDT
• Type: Integrated PHY Transceiverr

Specifications of 1893AFLF

• Rohs: yes
• Product: Ethernet Transceivers
• Data Rate: 10 Mb/s, 100 Mb/s
• Supply Voltage - Max: 3.47 V
• Supply Voltage - Min: 3.14 V
• Maximum Operating Temperature: + 70 C
• Package / Case: SSOP-48
• Ethernet Connection Type: 100Base-TX, 10Base-T
• Maximum Supply Current: 160 mA
• Minimum Operating Temperature: 0 C
• Standard Supported: 802.3
• Part # Aliases: ICS1893AFLF

ICS1893AF, Rev. D 10/26/04
Table 9-8. MAC/Repeater Interface Pins: Media Independent Interface (MII) (Continued)
RXD0,
RXD1,
RXD2,
RXD3
RXDV
RXER
TXCLK
Name
Pin
ICS1893AF Data Sheet - Release
Number
Pin
31,
30,
29,
28
32
35
37
Output
Output
Output
Output
Type
Pin
Copyright © 2004, Integrated Circuit Systems, Inc.
Receive Data 0–3.
Receive Data Valid.
The ICS1893AF asserts RXDV to indicate to the MAC/repeater that data
is available on the MII Receive Bus (RXD[3:0]). The ICS1893AF:
Receive Error.
When the MAC/Repeater Interface is in:
Transmit Clock.
The ICS1893AF generates this clock signal to synchronize the transfer of
data from the MAC/Repeater Interface to the ICS1893AF. When the
mode is:
Note: RXDV is synchronous with the Receive Data Clock, RXCLK.
1. An ICS1893AF asserts a signal on the RXER pin upon detection of a
2. The RXER signal always transitions synchronously with RXCLK.
3. The signal on RXER pin is conditioned by the RXTRI pin.
•
•
•
•
•
•
Note:
•
•
RXD0 is the least-significant bit and RXD3 is the most-significant bit of
the MII receive data nibble.
While the ICS1893AF asserts RXDV, the ICS1893AF transfers the
receive data signals on the RXD0–RXD3 pins to the MAC/Repeater
Interface synchronously on the rising edges of RXCLK.
Asserts RXDV after it detects and recovers the Start-of-Stream
delimiter, /J/K/. (For the timing reference, see
“100M/MII Media Independent Interface: Synchronous Receive
Timing”.)
De-asserts RXDV after it detects either the End-of-Stream delimiter
(/T/R/) or a signal error.
10M MII mode, RXER is not used.
100M MII mode, the ICS1893AF asserts a signal on the RXER pin
when either of the following two conditions are true:
– Errors are detected during the reception of valid frames
– A False Carrier is detected
10Base-T, the TXCLK frequency is 2.5 MHz.
100Base-TX, the TXCLK frequency is 25 MHz.
False Carrier so that repeater applications can prevent the
propagation of a False Carrier.
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107
Chapter 9 Pin Diagram, Listings, and Descriptions
Pin Description
Chapter 10.5.6,
October, 2004