1893AFLF IDT, 1893AFLF Datasheet - Page 78

• Manufacturer Part Number: 1893AFLF
• Description: Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
• Manufacturer: IDT
• Type: Integrated PHY Transceiverr

Specifications of 1893AFLF

• Rohs: yes
• Product: Ethernet Transceivers
• Data Rate: 10 Mb/s, 100 Mb/s
• Supply Voltage - Max: 3.47 V
• Supply Voltage - Min: 3.14 V
• Maximum Operating Temperature: + 70 C
• Package / Case: SSOP-48
• Ethernet Connection Type: 100Base-TX, 10Base-T
• Maximum Supply Current: 160 mA
• Minimum Operating Temperature: 0 C
• Standard Supported: 802.3
• Part # Aliases: ICS1893AFLF

8.8 Register 6: Auto-Negotiation Expansion Register
8.8.1 IEEE Reserved Bits (bits 6.15:5)
ICS1893AF, Rev D 10/26/04
Table 8-13
Auto-Negotiation process.
Note:
Table 8-13. Auto-Negotiation Expansion Register (register 6 [0x06])
† As per the IEEE Std 802.3u, during any write operation to any bit in this register, the STA must write the default value
The ISO/IEC specification reserves these bits for future use. When an STA:
•
•
ICS uses some reserved bits to invoke auxiliary functions. To ensure proper operation of the ICS1893AF,
an STA must maintain the default value of these bits. Therefore, ICS recommends that an STA always write
the default value of any reserved bits during all management register write operations.
Reserved bits 5.15:5 are Command Override Write (CW) bits. When the Command Register Override bit
(bit 16.15) is logic:
•
•
6.15
6.14
6.13
6.12
6.11
6.10
6.9
6.8
6.7
6.6
6.5
6.4
6.3
6.2
6.1
6.0
Bit
to all Reserved bits.
Reads a reserved bit, the ICS1893AF returns a logic zero.
Writes to a reserved bit, the STA must use the default value specified in this data sheet.
Zero, the ICS1893AF isolates all STA writes to CW bits.
One, an STA can modify the value of these bits
ICS1893AF Data Sheet - Release
IEEE reserved
IEEE reserved
IEEE reserved
IEEE reserved
IEEE reserved
IEEE reserved
IEEE reserved
IEEE reserved
IEEE reserved
IEEE reserved
IEEE reserved
Parallel detection fault
Link partner Next Page
able
Next Page able
Page received
Link partner
Auto-Negotiation able
For an explanation of acronyms used in
lists the bits for the Auto-Negotiation Expansion Register, which indicates the status of the
Definition
Copyright © 2004, Integrated Circuit Systems, Inc.
Always 0
Always 0
Always 0
Always 0
Always 0
Always 0
Always 0
Always 0
Always 0
Always 0
Always 0
No Fault
Link partner is not Next
Page able
Local device is not Next
Page able
Next Page not received
Link partner is not
Auto-Negotiation able
When Bit = 0
All rights reserved.
78
Table
8-13, see
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
detected
Link partner is Next Page
able
Local device is Next Page
able
Next Page received
Link partner is
Auto-Negotiation able
Multiple technologies
When Bit = 1
Chapter 1, “Abbreviations and
Chapter 8 Management Register Set
cess
Ac-
CW
CW
CW
CW
CW
CW
CW
CW
CW
CW
CW
RO
RO
RO
RO
RO
SF
LH
LH
–
–
–
–
–
–
–
–
–
–
–
–
–
–
October, 2004
Acronyms”.
fault
De-
0†
0†
0†
0†
0†
0†
0†
0†
0†
0†
0†
0
0
1
0
0
Hex
0
0
0
4