MD8331-D2G-V3-X-P SanDisk, MD8331-D2G-V3-X-P Datasheet - Page 45

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MD8331-D2G-V3-X-P

Manufacturer Part Number
MD8331-D2G-V3-X-P
Description
IC MDOC G4 2GB 69-FBGA
Manufacturer
SanDisk
Datasheet

Specifications of MD8331-D2G-V3-X-P

Format - Memory
FLASH
Memory Type
FLASH - Nand
Memory Size
2G (256M x 8)
Speed
33ns
Interface
Parallel
Voltage - Supply
2.5 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
69-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
585-1149-2
MD8831-D2G-V3-X-P
MD8832-D2G-V3-X-P

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7.14 Interrupt Status Register
Description:
Address (hex): 1020
7.15 Output Control Register
Description:
Address (hex): 1014
45
Read/Write
Description
Reset Value
Read/Write
Description
Reset Value
Bit No.
Bit No.
Bit No.
5-0
7-6
15
0
STATUS. Indicates which interrupt sources created an interrupt. For a list of the interrupt
sources, please refer to the description of the Interrupt Control register.
Reserved for future use.
BUSY_EN (Busy Enable). Controls the assertion of the BUSY# output during a download
initiated by a soft reset.
1: Enables the assertion of the BUSY# output
0: Disables the assertion of the BUSY# output
Upon the assertion of the RSTIN# input, this bit will be set automatically and the BUSY#
GMASK (Global Mask).
1: Enables the IRQ# output to be asserted. Setting this bit while one or more interrupts are
0: Forces the IRQ# output to the negated state.
This register indicates which interrupt source created an interrupt.
This register controls the behavior of certain output signals. This register is reset
by a hardware reset, not by entering Reset mode.
Note: When multiple devices are cascaded, writing to this register will affect all
pending will generate an interrupt.
Bit 7
Bit 7
0
0
devices regardless of the value of the ID[1:0] inputs.
RFU_0
R
Bit 6
Bit 6
0
0
Data Sheet (Preliminary) Rev. 0.3
RFU_0
Bit 5
Bit 5
R
0
0
Bit 4
Bit 4
0
Description
Description
Description
0
STATUS
Bit 3
Bit 3
R/W
0
0
DiskOnChip G4 128MB (1Gb)/256MB (2Gb) 1.8V
Turbo
Bit 2
Bit 2
0
0
PU_DIS
Bit 1
R/W
Bit 1
0
0
92-DS-1105-00
BUSY_EN
Bit 0
Bit 0
1
0

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