ATEVK1105 Atmel, ATEVK1105 Datasheet - Page 368

KIT EVAL FOR AT32UC3A0

ATEVK1105

Manufacturer Part Number
ATEVK1105
Description
KIT EVAL FOR AT32UC3A0
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets

Specifications of ATEVK1105

Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A0512
Processor Series
AVR
Data Bus Width
32 bit
Interface Type
USART, TWI, USB, SPI, Ethernet
Operating Supply Voltage
3.3 V
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A0512
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A0
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
27.5
27.5.1
27.6
27.6.1
27.6.1.1
Figure 27-2. SMC Connections to Static Memory Devices
27.6.2
32058J–AVR32–04/11
Product Dependencies
Functionnal Description
EBI I/O Lines
Application Example
External Memory Mapping
Static Memory
Controller
Hardware Interface
A1/NWR2/NBS2
NWR3/NBS3
NWR1/NBS1
NWR0/NWE
A0/NBS0
A2-A25
D0-D31
NCS1
NCS3
NCS4
NCS5
NCS0
NCS2
The Static Memory Controller signals pass througth the EBI module where they are multiplexed.
The programmer must first configure the GPIO controller to assign the EBI pins corresponding to
SMC signals to their peripheral function. If I/O lines of the EBI corresponding to SMC
signals are not used by the application, they can be used for other purposes by the GPIO
Controller.
The SMC provides up to 26 address lines, A[25:0]. This allows each chip select line to address
up to 64 Mbytes of memory.
A1/NWR2/NBS2
NWR0/NWE
NRD
NRD
D16-D23
D0-D7
CS
OE
CS
OE
WE
WE
D0-D7
D0-D7
128K x 8
128K x 8
SRAM
SRAM
A0-A16
A0-A16
A2-A18
A2-A18
NWR1/NBS1
NWR3/NBS3
D24-D31
D8-D15
NRD
NRD
CS
OE
CS
OE
WE
WE
D0-D7
D0-D7
128K x 8
128K x 8
SRAM
SRAM
A0-A16
A0-A16
A2-A18
A2-A18
AT32UC3A
368

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