ATEVK1105 Atmel, ATEVK1105 Datasheet - Page 818

• Manufacturer Part Number: ATEVK1105
• Description: KIT EVAL FOR AT32UC3A0
• Manufacturer: Atmel
• Series: AVR®32r
• Type: MCUr

Specifications of ATEVK1105

• Contents: Evaluation Board, Software and Documentation
• Processor To Be Evaluated: AT32UC3A0512
• Processor Series: AVR
• Data Bus Width: 32 bit
• Interface Type: USART, TWI, USB, SPI, Ethernet
• Operating Supply Voltage: 3.3 V
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: AVR UC3
• Silicon Core Number: AT32UC3A0512
• Silicon Family Name: AVR
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT32UC3A0
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table of Contents
1
2
3
4
5
6
7
8
9
10 Memories . .............................................................................................. 33
11 Fuses Settings . ...................................................................................... 36
12 Peripherals . ............................................................................................ 38
32058J–AVR32–04/11
Description . ............................................................................................. 3
Configuration Summary . ........................................................................ 4
Abbreviations . ......................................................................................... 4
Blockdiagram . ......................................................................................... 5
Signals Description . ................................................................................ 8
Power Considerations . ......................................................................... 13
Package and Pinout . ............................................................................. 16
I/O Line Considerations . ....................................................................... 20
Processor and Architecture . ................................................................ 21
4.1Processor and architecture . .......................................................................................6
6.1Power Supplies . .......................................................................................................13
6.2Voltage Regulator . ...................................................................................................14
6.3Analog-to-Digital Converter (A.D.C) reference. . ......................................................15
8.1JTAG pins .................................................................................................................20
8.2RESET_N pin . .........................................................................................................20
8.3TWI pins . .................................................................................................................20
8.4GPIO pins . ...............................................................................................................20
9.1AVR32 Architecture . ................................................................................................21
9.2The AVR32UC CPU . ...............................................................................................21
9.3Programming Model . ...............................................................................................25
9.4Exceptions and Interrupts . .......................................................................................29
10.1Embedded Memories . ...........................................................................................33
10.2Physical Memory Map . ..........................................................................................33
10.3Bus Matrix Connections . ........................................................................................34
11.1Flash General Purpose Fuse Register (FGPFRLO) . .............................................36
11.2Default Fuse Value . ...............................................................................................37
12.1Peripheral address map . .......................................................................................38
12.2CPU Local Bus Mapping . ......................................................................................39
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