C8051F120DK Silicon Laboratories Inc, C8051F120DK Datasheet - Page 305

• Manufacturer Part Number: C8051F120DK
• Description: DEVKIT-F120/21/22/23/24/25/26/27
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F120DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F12x and C8051F13x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F120
• Silicon Family Name: C8051F12x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F120, 121, 122, 123, 124, 125, 126, 127
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1224

Table 22.1. Timer Settings for Standard Baud Rates Using The Internal 24.5 MHz
Bits7–0: SBUF1[7:0]: Serial Data Buffer Bits 7-0 (MSB-LSB)
R/W
Bit7
X = Don’t care
*Note: SCA1-SCA0 and T1M bit definitions can be found in
Baud Rate
This SFR accesses two registers; a transmit shift register and a receive latch register. When
data is written to SBUF1, it goes to the transmit shift register and is held for serial transmis-
sion. Writing a byte to SBUF1 is what initiates the transmission. A read of SBUF1 returns the
contents of the receive latch.
230400
115200
Target
57600
28800
14400
(bps)
9600
2400
1200
SFR Definition 22.2. SBUF1: Serial (UART1) Port Data Buffer
R/W
Bit6
Baud Rate
% Error
-0.32%
-0.32%
-0.32%
-0.32%
-0.32%
0.15%
0.15%
0.15%
R/W
Bit5
tor Divide
R/W
Bit4
Oscilla-
Factor
10176
20448
1704
2544
106
212
426
848
Frequency: 24.5 MHz
Oscillator
Rev. 1.4
SYSCLK / 12
SYSCLK / 12
SYSCLK / 48
SYSCLK / 48
R/W
Timer Clock
Bit3
SYSCLK / 4
SYSCLK
SYSCLK
SYSCLK
Source
C8051F120/1/2/3/4/5/6/7
R/W
Bit2
Section 23.1
SCA1-SCA0
(pre-scale
select)*
C8051F130/1/2/3
XX
XX
XX
01
00
00
10
10
R/W
Bit1
.
SFR Address:
SFR Page:
T1M*
R/W
Bit0
1
1
1
0
0
0
0
0
Value (hex)
0x99
1
00000000
Reset Value
Timer 1
Reload
0xCB
0x2B
0xB9
0x2B
0x96
0x96
0x96
0x96
305