IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 211

• Manufacturer Part Number: IPT-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPT-DSPBUILDER

• Function: DSP Builder
• License: Initial License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 2: Arithmetic Library
Bit Level Sum of Products
Table 2–3. Barrel Shifter Block I/O Formats
Figure 2–1. Barrel Shifter Block Example
Bit Level Sum of Products
© June 2010 Altera Corporation
I
O
Notes to
(1) For signed integers and signed binary fractional numbers, the MSB is the sign bit.
(2) [L] is the number of bits on the left side of the binary point; [R] is the number of bits on the right side of the binary point. For signed or unsigned
(3) I1
(4) Explicit means that the port bit width information is a block parameter. Implicit means that the port bit width information is set by the datapath
I/O
integers R = 0, that is, [L].[0]. For single bits, R = 0, that is, [1] is a single bit.
bit width propagation mechanism. To specify the bus format of an implicit input port, use a Bus Conversion block to set the width.
I1
I2
I3
O1
[L].[R]
[L1].[R1]
[L2].[R2]
[1]
[L1].[R1]
Table
Simulink (2),
is an input port. O1
2–3:
(3)
Table 2–3
Figure 2–1
The Bit Level Sum of Products block performs a sum of the multiplication of
one-bit inputs by signed integer fixed coefficients.
The Bit Level Sum of Products block uses the equation:
where:
■
■
■
■
Table 2–4 on page 2–4
outputs.
[L].[R]
q = a(0)C0 + ... + a(i)Ci + ... + a(n–1)C
q is the output result
a(i) is the one-bit input data
Ci are the signed integer fixed coefficients
n is the number of coefficients in the range one to eight
I1: in STD_LOGIC_VECTOR({L1 + R1 - 1} DOWNTO 0)
I2: in STD_LOGIC_VECTOR({L2 + R2 - 1} DOWNTO 0)
I3: in STD_LOGIC
O1: out STD_LOGIC_VECTOR({L1 + R1 - 1} DOWNTO 0
is an output port.
shows the Barrel Shifter block I/O formats.
shows an example with the Barrel Shifter block.
(Note 1)
shows the Bit Level Sum of Products block inputs and
Preliminary
VHDL
n-1
DSP Builder Standard Blockset Libraries
Explicit
Explicit
Explicit
Type
(4)
2–3