IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 77

• Manufacturer Part Number: IPT-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPT-DSPBUILDER

• Function: DSP Builder
• License: Initial License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 4: Using MegaCore Functions
MegaCore Function Design Example
Parameterizing the FIR Compiler Function
Generating the FIR Compiler Function Variation
Adding Stimulus and Scope Blocks
© June 2010 Altera Corporation
f
Figure 4–2. FIR Compiler Block Placed in Simulink Model
4. Rename the block to my_fir_compiler. To rename the block, click the default
To use FIR Compiler to create a MegaCore function variation that fits the specific
needs of your design, follow these steps:
1. Double-click the my_fir_compiler block to start IP Toolbench.
2. Click Step 1: Parameterize to specify how the FIR filter should operate.
3. Use the default values, specifying a low-pass filter. Click Finish.
After you parameterize the MegaCore function, to generate the files for inclusion in
the Simulink model and simulation, follow these steps:
1. Click Step 2: Generate in IP Toolbench.
2. The generation report lists the design files that IP Toolbench creates.
3. Click Exit.
For more information about the FIR Compiler including a complete description of the
generated files, refer to the
The my_fir_compiler block in the Simulink model updates to show the input and
output ports for your configuration
connect it to the rest of your Simulink design.
Figure 4–3. FIR Compiler Block in Simulink Model After Generation
To create a sample design to test the low-pass filter by feeding the filter two sine
waves
name (the text outside of the block itself) and edit the text. Naming conventions
are described in
The Parameterize - FIR Compiler MegaCore function dialog box displays.
(Figure 4–4 on page
“DSP Builder Naming Conventions” on page
4–8), follow these steps:
FIR Compiler User
Preliminary
(Figure
4–3). The FIR filter is ready for you to
Guide.
DSP Builder Standard Blockset User Guide
3–1.
4–5