IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 244

• Manufacturer Part Number: IPT-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPT-DSPBUILDER

• Function: DSP Builder
• License: Initial License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

2–36
Table 2–54. Square Root Block Parameters (Part 2 of 2)
Table 2–55. Square Root Block I/O Formats
Figure 2–21. Square Root Block Design Example
Sum of Products
DSP Builder Standard Blockset Libraries
Use Asynchronous Clear Port On or Off
Use Remainder Port
I
O
Notes to
(1) For signed integers and signed binary fractional numbers, the MSB is the sign bit.
(2) [L] is the number of bits on the left side of the binary point; [R] is the number of bits on the right side of the binary point. For signed or unsigned
(3) I1
(4) Explicit means that the port bit width information is a block parameter. Implicit means that the port bit width information is set by the datapath
I/O
integers R = 0, that is, [L].[0]. For single bits, R = 0, that is, [1] is a single bit.
bit width propagation mechanism. To specify the bus format of an implicit input port, use a Bus Conversion block to set the width.
I1
I2
I3
O1
O2
[L].[R]
[L].[R]
[1]
[1]
[L].[R]
[L].[R]
Table
Simulink (2),
is an input port. O1
Name
2–55:
(3)
Table 2–55
Figure 2–21
The Sum of Products block implements the following expression:
where:
■
■
■
■
Table 2–56
[L].[R]
q = a(0)C0 + ... + a(i)Ci + ... + a(n-1)C
q is the output result
a(i) is the signed integer input data
Ci are the signed integer fixed coefficients
n is the number of coefficients in the range one to eight
I1: in STD_LOGIC_VECTOR({L + R} DOWNTO 0)
I2: in STD_LOGIC
I3: in STD_LOGIC
O1: out STD_LOGIC_VECTOR({L + R} DOWNTO 0)
O2: out STD_LOGIC_VECTOR({L + R} DOWNTO 0)
is an output port.
On or Off
shows the Square Root block I/O formats.
shows the Sum of Products block inputs and outputs.
shows an example of the Square Root block.
Value
(Note 1)
Turn on to use the asynchronous clear input (aclr).
Turn on to use the remainder input (remainder).
Preliminary
VHDL
n-1
Description
© June 2010 Altera Corporation
Chapter 2: Arithmetic Library
Explicit
Explicit
Type
Sum of Products
(4)