MCHC908MR8VFAE Freescale Semiconductor, MCHC908MR8VFAE Datasheet - Page 188

• Manufacturer Part Number: MCHC908MR8VFAE
• Description: IC MCU 8K FLASH 8MHZ PWM 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908MR8VFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Processor Series: HC08MR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Monitor ROM (MON)
10.4 Functional Description
10.4.1 Entering Monitor Mode
Technical Data
188
X = Don’t care
PTB0 = V
PTB0 (RXD) and PTB1 (TXD) used for serial communications (all monitor mode)
IRQ
V
V
V
Pin
V
X
DD
DD
SS
HI
RESET
V
V
V
V
V
V
or
DD
DD
DD
DD
SS
HI
DD
and PTB1 = V
Non-blank
$FFFE/
$FFFF
Blank
Blank
(FF)
(FF)
X
X
OFF
SS
PLL PTB0 PTB1
ON
ON
X
X
The monitor ROM receives and executes commands from a host
computer.
mode and communicate with a host computer via a standard RS-232
interface.
Simple monitor commands can access any memory address. In monitor
mode, the MCU can execute host-computer code in RAM while all MCU
pins retain normal operating mode functions. All communication
between the host computer and the MCU is through the serial
communications interface (SCI). A level-shifting RS-232 interface is
required between the SCI and the host computer. PTB1 requires a
pulldown resistor to ensure proper entry into monitor mode.
Table 10-1
to enter monitor mode
V
X
X
X
X
DD
Table 10-1. Mode Selection
V
X
X
X
X
SS
Figure 10-1
shows the pin conditions for entering monitor mode.
External
4.0 MHz 16.0 MHz 8.0 MHz Disabled 9600
4.0 MHz 16.0 MHz 8.0 MHz Disabled 9600
Monitor ROM (MON)
Clock
f
OSC
X
X
CGMOUT
shows a sample circuit used to enter monitor
f
OSC
X
0
/2
f
OSC
f
X
op
0
/4
Disabled
Disabled
Enabled
COP
MC68HC908MR8 — Rev 4.1
Baud
/1024
Rate
f
OSC
Freescale Semiconductor
X
0
No operation
until reset = V
PLL configured with
BCS set by monitor
code
PLL configured with
BCS set by monitor
code
Enters monitor
mode with any
external clock rate
within operating
spec
Enters user mode
Comment
DD