MCHC908MR8VFAE Freescale Semiconductor, MCHC908MR8VFAE Datasheet - Page 280

• Manufacturer Part Number: MCHC908MR8VFAE
• Description: IC MCU 8K FLASH 8MHZ PWM 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908MR8VFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Processor Series: HC08MR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Input/Output (I/O) Ports
Technical Data
280
$0000
$0001
$0002
$0003
$0004
$0005
$0006
Addr.
Data Direction Register C
Data Direction Register A
Data Direction Register B
Register Name
Port A Data Register
Port B Data Register
Port C Data Register
Unimplemented
See page 281.
See page 284.
See page 287.
See page 282.
See page 284.
See page 287.
(DDRC)
(DDRA)
(DDRB)
(PTC)
(PTA)
(PTB)
Figure 14-1. I/O Port Register Summary
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Input/Output (I/O) Ports
mented
= Unimple-
Bit 7
U
0
0
DDRA
DDRB
PTA6
PTB6
U
6
6
0
6
0
DDRA
DDRB
PTA5
PTB5
U
R
5
5
0
5
0
Unaffected by reset
Unaffected by reset
Unaffected by reset
DDRA
DDRB
= Reserved
PTA4
PTB4
U
4
4
0
4
0
DDRA
DDRB
PTA3
PTB3
U
3
3
0
3
0
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
DDRA
DDRB
PTA2
PTB2
U
U
2
2
0
2
0
DDRA
DDRB
DDRC
= Unaffected
PTC1
PTA1
PTB1
1
1
0
1
0
1
0
DDRA
DDRB
DDRC
PTC0
PTA0
PTB0
Bit 0
0
0
0
0
0
0