MCHC908MR8VFAE Freescale Semiconductor, MCHC908MR8VFAE Datasheet - Page 314

• Manufacturer Part Number: MCHC908MR8VFAE
• Description: IC MCU 8K FLASH 8MHZ PWM 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908MR8VFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Processor Series: HC08MR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Analog-to-Digital Converter (ADC)
18.4.2 Voltage Conversion
18.4.3 Conversion Time
Technical Data
314
NOTE:
NOTE:
When the input voltage to the ADC equals V
signal to $3FF (full scale). If the input voltage equals V
converts it to $000. Input voltages between V
straight-line linear conversions. All other input voltages will result in
$3FF if greater than V
Input voltage should not exceed the analog supply voltages.
Conversion starts after a write to the ADC status and control register
(ADSCR). A conversion is between 16 and 17 ADC clock cycles,
therefore:
The ADC conversion time is determined by the clock source chosen and
the divide ratio selected. The clock source is either the bus clock or
CGMXCLK and is selectable by ADICLK located in the ADC clock
register. For example, if CGMXCLK is 4 MHz and is selected as the ADC
input clock source, the ADC input clock /4 prescale is selected:
The ADC frequency must be between f
maximum to meet A/D specifications.
Since an ADC cycle may be comprised of several bus cycles (four in the
prior example) and the start of a conversion is initiated by a bus cycle
write to the ADSCR, from zero to four additional bus cycles may occur
before the start of the initial ADC cycle. This results in a fractional ADC
cycle and is represented as the 17th cycle.
Number of bus cycles = conversion time x bus frequency
Analog-to-Digital Converter (ADC)
Conversion time =
Conversion time =
REFH
and $000 if less than V
16 to 17 ADC cycles
16 to 17 ADC cycles
ADC frequency
4 MHz/4
ADIC
REFH
minimum and f
REFH
MC68HC908MR8 — Rev 4.1
, the ADC converts the
Freescale Semiconductor
SS
and V
= 16 to 17 µs
.
SS,
REFL
the ADC
ADIC
are