MCHC908MR8VFAE Freescale Semiconductor, MCHC908MR8VFAE Datasheet - Page 294

IC MCU 8K FLASH 8MHZ PWM 32-LQFP

MCHC908MR8VFAE

Manufacturer Part Number
MCHC908MR8VFAE
Description
IC MCU 8K FLASH 8MHZ PWM 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCHC908MR8VFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LVD, POR, PWM
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Processor Series
HC08MR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCHC908MR8VFAE
Manufacturer:
Freescale
Quantity:
8 393
Part Number:
MCHC908MR8VFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Computer Operating Properly (COP)
15.4.4 Internal Reset
15.4.5 Reset Vector Fetch
15.4.6 COP Disable
15.5 COP Control Register
15.6 Interrupts
Technical Data
294
An internal reset clears the SIM counter and the COP counter.
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the SIM counter.
The COP disable (COPD) signal reflects the state of the COP disable bit
(COPD) in the configuration register (CONFIG). See
The COP control register (COPCTL) is located at address $FFFF and
overlaps the reset vector. Writing any value to $FFFF clears the COP
counter and starts a new timeout period. Reading location $FFFF
returns the low byte of the reset vector.
Reset:
The COP does not generate CPU interrupt requests.
dress:
Read:
Write:
Ad-
$FFFF
Bit 7
Computer Operating Properly (COP)
Figure 15-3. COP Control Register (COPCTL)
6
5
Low byte of reset vector
Unaffected by reset
Clear COP counter
4
3
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
2
5.4 CONFIG
1
Bit 0
Bits.

Related parts for MCHC908MR8VFAE