MCHC908MR8VFAE Freescale Semiconductor, MCHC908MR8VFAE Datasheet - Page 306

• Manufacturer Part Number: MCHC908MR8VFAE
• Description: IC MCU 8K FLASH 8MHZ PWM 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908MR8VFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Processor Series: HC08MR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Low-Voltage Inhibit (LVI)
17.4 Functional Description
Technical Data
306
FROM LVISCR
V
DETECTOR
NOTE:
TRPSEL
LOW V
DD
DD
V
V
DD
DD
Figure 17-1
out of reset. The LVI module contains a bandgap reference circuit and
comparator.
The LVI power bit, LVIPWR, enables the LVI to monitor V
LVI reset bit, LVIRST, enables the LVI module to generate a reset when
V
nine or more consecutive CGMXCLK.
Once an LVI reset occurs, the MCU remains in reset until V
above a voltage, V
only one central processor unit (CPU) cycle to bring the microcontroller
unit (MCU) out of reset. See
The output of the comparator controls the state of the LVIOUT flag in the
LVISCR.
An LVI reset also drives the RST pin low to provide low-voltage
protection to external peripheral devices.
> LVITRIP = 0
< LVITRIP = 1
DD
•
•
Figure 17-1. LVI Module Block Diagram
CPU CLOCK
falls below a voltage, V
V
status and control register (LVISCR). See
LVIPWR and LVIRST are in the configuration (CONFIG) register.
See
ANLGTRIP
FROM CONFIG
LVRX
LVIPWR
5.4 CONFIG
shows the structure of the LVI module. The LVI is enabled
and V
Low-Voltage Inhibit (LVI)
DIGITAL FILTER
LVRX
V
LVHX
DD
+ V
Bits.
are determined by the TRPSEL bit in the LVI
LVIOUT
LVHX
LVRX
7.4.2.5 Low-Voltage Inhibit (LVI)
. V
, and remains at or below that level for
DD
FROM CONFIG
LVIRST
must be above V
MC68HC908MR8 — Rev 4.1
Figure
Freescale Semiconductor
LVRX
LVI RESET
DD
17-2.
voltage. The
DD
+ V
rises
LVHX
Reset.
for