MCHC908MR8VFAE Freescale Semiconductor, MCHC908MR8VFAE Datasheet - Page 227

• Manufacturer Part Number: MCHC908MR8VFAE
• Description: IC MCU 8K FLASH 8MHZ PWM 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908MR8VFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Processor Series: HC08MR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

12.4 Functional Description
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
$0058
$0059
Addr.
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A
B
TIMB Channel 0 Register
TIMB Channel 1 Register
TIMB Channel 1 Register
Register Name
TIMB Channel 1 Sta-
tus/Control Register
See page 246.
See page 246.
See page 246.
See page 246.
Figure 12-2. TIMB I/O Register Summary (Continued)
(TBCH1H)
(TBCH0L)
(TBCH1L)
(TBSC1)
Figure 12-1
TIMB is the 16-bit TIMB counter that can operate as a free-running
counter or a modulo up-counter. The TIMB counter provides the timing
reference for the input capture and output compare functions. The TIMB
counter modulo registers, TBMODH–TBMODL, control the modulo
value of the TIMB counter. Software can read the TIMB counter value at
any time without affecting the counting sequence.
High
Low
Low
Read
Read
Read
Read
Write
Write
Write
Write
Re-
set:
Re-
set:
Re-
set:
Re-
set:
:
:
:
:
:
:
:
:
shows the TIMB structure. The central component of the
CH1F
Bit 15
Timer Interface B (TIMB)
Bit 7
Bit 7
Bit 7
R
0
0
CH1IE
= Reserved
Bit 14
Bit 6
Bit 6
6
0
Bit 13
Bit 5
Bit 5
R
5
0
0
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
MS1A ELS1B ELS1A
Bit 12
Bit 4
Bit 4
4
0
Bit 11
Bit 3
Bit 3
3
0
Bit 10
Timer Interface B (TIMB)
Bit 2
Bit 2
2
0
Functional Description
TOV1
Bit 1
Bit 1
Bit 9
Technical Data
1
0
CH1MA
Bit 0
Bit 0
Bit 0
Bit 8
X
0
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