HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1091

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
31.3.1
MODER specifies the MMCIF operating mode. The MMCIF has an operating mode: MMC mode.
Three signals, clock, command, and data signals, are used as the interfaces between the host
system and the MMC in MMC mode. The clock signal is used to make the host system and the
MMC synchronize each other. The command signal is used to issue a command from the host
system to the MMC and send a response from the MMC to the host system. The data signal is
used to write data to and read data from the MMC. The command and data signals are
bidirectional buses.
The following sequence should be repeated when the MMCIF uses the MMC: Send a command,
wait for the end of the command sequence and the end of the data busy state, and send the next
command.
31.3.2
CMDTYR specifies the command format in conjunction with RSPTYR. Bits TY1 and TY0
specify the existence and direction of transfer data, and bits TY6 to TY2 specify the additional
settings. All of bits TY6 to TY2 should be cleared to 0 or only one of them should be set to 1. Bits
TY6 to TY2 can only be set to 1 if the corresponding settings in bits TY1 and TY0 allow that
setting. If this register is not set correctly, operation cannot be guaranteed.
To perform single-block transfer, bits TY1 and TY0 should be set to 01 or 10 and bits TY6 to TY2
to 0.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
7 to 1
0
Bit Name
⎯
⎯
Mode Register (MODER)
Command Type Register (CMDTYR)
Initial
Value
All 0
0
R/W
⎯
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Reserved
The write value should always be 0.
Section 31 MultiMediaCard Interface (MMCIF)
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