HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 693

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
(5)
Figure 18.15 shows sample flowcharts for serial reception.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Data Transfer Operations (Serial Data Reception)
When using receive FIFO data interrupt,
Read receive trigger number of receive
Set receive trigger number in RTRG1
Figure 18.15 Sample Serial Reception Flowchart (1)
Clear RE bit in SCSCR to 0
data bytes from SCFRDR
and RTRG0 in SCFCR
Set RE bit in SCSCR
Start of reception
End of reception
set RIE bit to 1
RDF =1?
(First Reception after Initialization)
Yes
No
1
2
3
4
Section 18 Serial Communication Interface with FIFO (SCIF)
1. Set the receive trigger number
2. Reception is started when the
3. Read receive data while the
4. After the end of reception, clear
in SCFCR.
RE bit in SCSCR is set to 1.
RDF bit is 1.
the RE bit to 0.
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