HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 286

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 7 Exception Handling
Notes: 1. Priorities are indicated from high to low, 1 being the highest and 3 the lowest.
Page 226 of 1414
Exception
Type
General
exception
events
(asynchro-
nous)
General
interrupt
requests
(asynchro-
nous)
2. For details on priorities in multiple interrupt sources, refer to section 8, Interrupt
3. If an interrupt is accepted, the exception event register (EXPEVT) is not changed. The
4. If one of these exceptions occurs in a specific part of the repeat loop, a specific code
5. These exception codes are valid when the MMU is used.
Current
Instruction Exception Event
Completed
Completed
A reset has the highest priority. An interrupt is accepted only when general exceptions
are not requested.
Controller (INTC).
interrupt source code is specified in the interrupt event registers (INTEVT and
INTEVT2). For details, refer to section 8, Interrupt Controller (INTC).
and vector offset are specified.
User breakpoint
(Data break, I-BUS
break)
DMA address error
Interrupt requests
Priority*
2
2
3
1
Exception
Order
5
6
—*
2
Process
at BL=1
Ignored
Retained H'5C0
Retained —*
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
H'1E0
Vector
Code
3
Vector
Offset
H'00000100
H'00000100
H'00000600
Sep 21, 2010