HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 659

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
7
6
5
Bit Name
TIE
RIE
TE
Initial Value R/W
0
0
0
R/W
R/W
R/W
Description
Transmit Interrupt Enable
Enables or disables the transmit-FIFO-data-empty
interrupt requested when the TDFE flag of SCSSR is
set to 1.
0: Transmit-FIFO-data-empty interrupt request
1: Transmit-FIFO-data-empty interrupt request
Note:
Receive Interrupt Enable
Enables or disables the receive-FIFO-data-full
interrupt requested when the RDF flag of SCSSR is
set to1.
0: Receive-FIFO-data-full interrupt request disabled*
1: Receive-FIFO-data-full interrupt request enabled
Note:
Transmit Enable
Enables or disables the SCIF serial transmitter.
0: Transmitter disabled
1: Transmitter enabled*
Note:
disabled*
enabled
Section 18 Serial Communication Interface with FIFO (SCIF)
* The transmit-FIFO-data empty interrupt
* The receive-FIFO-data -full interrupt
* The serial mode register (SCSMR) and
request can be cleared by writing the
greater number of transmit data than the
specified number of transmission triggers
to SCFTDR and by clearing TDFE to 0
after reading 1 from TDFE, or can be
cleared by clearing TIE to 0.
request can be cleared by reading the
RDF flag after it has been set to 1, then
clearing the flag to 0, or by clearing the
RIE bit to 0.
FIFO control register (SCFCR) should be
set to select the transmit format and reset
the transmit FIFO before setting the TE bit
to 1.
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