HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 678

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 18 Serial Communication Interface with FIFO (SCIF)
to 0 in transmitting. Set the TFRST bit in the SCFCR to 1 and reset the SCFTDR before TE is set
again to start transmission.
When an external clock is used, the clock should not be stopped during initialization or subsequent
operation. SCIF operation becomes unreliable if the clock is stopped.
Figure 18.2 is a sample flowchart for initializing the SCIF.
Page 618 of 1414
Set operating clock source in SCSMR
Clear TE and RE bits in SCSCR to 0
bits in SCSCR2 (leaving TE and RE
Clear TFRST and RFRST bits to 0
TTRG1, and TTRG0 in SCFCR
Set TFRST and RFRST bits in
SCSCR to 1,and set RIE,
1-bit interval elapsed?
Set TE and RE bits in
Set RTRG1, RTRG0,
Set CKE1 and CKE0
Set value in SCBRR
bits cleared to 0)
SCFCR to 1
and TIE bits
Figure 18.2 Sample SCIF Initialization Flowchart
Initialization
End
Yes
Wait
(4)
No
(1)
(2)
(3)
(1) Set the clock selection in SCSCR.
(2) Set the operating clock source in SCSMR.
(3) Write a value corresponding to the bit rate
(4) Wait at least one bit interval, then set the
Be sure to clear bits RIE TIE, TE, and RE
to 0.
into SCBRR.
(Not necessary if an external clock is used.)
TE bit or RE bit in SCSR to 1. Also set the
RIE and TIE bits.
Setting the TE and RE bits enables the
TxD and RxD pins to be used. When
transmitting, the SCIF will go to the mark
state; when receiving, it will go to the idle
state.
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010