HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 191

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
SH7720 Group, SH7721 Group
3.5.5
Figure 3.14 shows the ALU integer arithmetic operation flow. Table 3.23 shows the variation of
this type of operation. The correspondence between each operand and registers is the same as
ALU fixed-point operations as shown in table 3.22.
Table 3.23 Variation of ALU Integer Operations
Note: The ALU integer operations are basically 24-bit operation, the upper 16 bits of the base
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Mnemonic
PINC
PDEC
precision and 8 bits of the guard-bits parts. So the signed bit is copied to the guard-bit parts
when a register not providing the guard-bit parts is specified as the source operand. When
a register not providing the guard-bit parts is specified as a destination operand, the upper
word excluding the guard bits of the operation result are input into the destination register.
ALU Integer Operations
39
Guard
31
Source 1
Function
Increment by 1
Decrement by 1
Figure 3.14 ALU Integer Arithmetic Operation Flow
39
Guard
31
Destination
0
ALU
Source 1
Sx
+1
Sx
–1
39
Guard
31
Source 2
0
Source 2
+1
Sy
–1
Sy
DSR
Ignored
Cleared to 0
0
GT Z
Section 3 DSP Operating Unit
N
Destination
Dz
Dz
Dz
Dz
V DC
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