HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 970

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 26 LCD Controller (LCDC)
26.4.5
The display resolution is set up in LDHCNR, LDHSYNR, LDVDLNR, LDVTLNR, and
LDVSYNR. The LCD current-alternating period for an STN or DSTN display is set by using the
LDACLNR. The initial values in these registers are typical settings for VGA (640 × 480 dots) on
an STN or DSTN display.
The clock to be used is set with the LDICKR. The LCD module frame rate is determined by the
display interval + retrace line interval (non-display interval) for one screen set in a size related
register and the frequency of the clock used.
This LCDC has a Vsync interrupt function so that it is possible to issue an interrupt at the
beginning of each vertical retrace line period (to be exact, at the beginning of the line after the last
line of the display). This function is set up by using the LDINTR.
26.4.6
An LCD module normally requires a specific sequence for processing to do with the cutoff of the
input power supply. Settings in LDPMMR, LDPSPR, and LDCNTR, in conjunction with the LCD
power-supply control pins (LCD_VCPWC, LCD_VEPWC, and LCD_DON), are used to provide
processing of power-supply control sequences that suits the requirements of the LCD module.
Figures 26.4 to 26.7 are summary timing charts for power-supply control sequences and table 26.5
is a summary of available power-supply control sequence periods.
Page 910 of 1414
Setting the Display Resolution
Power Management Registers
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010