UPSD3433E-40U6 STMicroelectronics, UPSD3433E-40U6 Datasheet - Page 102

• Manufacturer Part Number: UPSD3433E-40U6
• Description: MCU 8BIT 8032 128KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3433E-40U6

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• For Use With: 497-5518 - EVAL BOARD RFID READER497-5218 - KIT DEVELOPMENT FOR UPSD3400497-2381 - CABLE PROGRAMMER FLASH LINK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-4907

Standard 8032 timer/counters
Note:
102/300
1
Table 61.
The RCLK1 and TCLK1 Bits in the SFR named PCON control UART1, and have the exact
same function as RCLK and TCLK.
Table 62.
capture
reload
Mode
16-bit
16-bit
Auto-
Bit
4
3
2
1
0
RCLK
TCLK
T2CON register bit definition (continued)
Timer/counter 2 operating modes
or
Symbol
0
0
0
0
TCLK
CP/RL2
EXEN2
Bits in T2CON SFR
C/T2
TR2
RL2
(1)
CP/
0
0
1
1
TR2 EXEN2
1
1
1
1
R/W
R,W
R,W
R,W
R,W
R,W
0
1
0
1
UART0 Transmit Clock control.
When TCLK = 1, UART0 uses Timer 2 overflow pulses for its
transmit clock in Modes 1 and 3. TCLK=0, Timer 1 overflow is
used for transmit clock
Timer 2 External Enable.
When EXEN2 = 1, capture or reload results when negative
edge on pin T2X occurs. EXEN2 = 0 causes Timer 2 to ignore
events at pin T2X.
Timer 2 run control.
1 = Timer/Counter 2 is on, 0 = Timer Counter 2 is off.
Counter or Timer function select.
When C/T2 = 0, function is timer, clocked by internal clock.
When C/T2 = 1, function is counter, clocked by signal sampled
on external pin, T2.
Capture/Reload.
When CP/RL2 = 1, capture occurs on negative transition at pin
T2X if EXEN2 = 1. When CP/RL2 = 0, auto-reload occurs
when Timer 2 overflows, or on negative transition at pin T2X
when EXEN2=1. When RCLK = 1 or TCLK = 1, CP/RL2 is
ignored, and Timer 2 is forced to auto-reload upon Timer 2
overflow
T2X
Pin
(1)
x
x
↓
↓
UPSD3422, UPSD3433, UPSD3434, UPSD3454
reload [RCAP2H, RCAP2L] to
[TH2, TL2] upon overflow
(upcounting)
reload [RCAP2H, RCAP2L] to
[TH2, TL2] at falling edge on pin
T2X
16-bit timer/counter
(upcounting)
Capture [TH2, TL2] and store to
[RCAP2H, RCAP2L] at falling
edge on pin T2X
Remarks
Definition
internal
f
f
OSC
OSC
Timer,
Input clock
/12
/12
MAX
f
MAX
f
Counter,
external
(Pin T2,
OSC
OSC
P1.0)
/24
/24