UPSD3433E-40U6 STMicroelectronics, UPSD3433E-40U6 Datasheet - Page 259

• Manufacturer Part Number: UPSD3433E-40U6
• Description: MCU 8BIT 8032 128KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3433E-40U6

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• For Use With: 497-5518 - EVAL BOARD RFID READER497-5218 - KIT DEVELOPMENT FOR UPSD3400497-2381 - CABLE PROGRAMMER FLASH LINK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-4907

UPSD3422, UPSD3433, UPSD3434, UPSD3454
28.6.4
Note:
4-pin JTAG ISP (default)
The four basic JTAG pins on Port C are enabled for JTAG operation at all times. These pins
may not be used for other I/O functions. There is no action needed in PSDsoft Express to
configure a device to use 4-pin JTAG, as this is the default condition. No 8032 firmware is
needed to use 4-pin ISP because all ISP functions are controlled from the external JTAG
program/test equipment.
JTAG program/test tool using 4-pin JTAG. It is required to connect the RST output signal
from the JTAG program/test equipment to the RESET_IN input on the UPSD34xx. The RST
signal is driven by the equipment with an Open Drain driver, allowing other sources (like a
push button) to drive RESET_IN without conflict.
The recommended pull-up resistors and decoupling capacitor are illustrated in
Figure 91. Recommended 4-pin JTAG connections
1. For 5 V UPSD34xx devices, pull-up resistors and V
2. For 3.3 V UPSD34xx devices, pull-up resistors and V
3. This signal is driven by an Open-Drain output in the JTAG equipment, allowing more than one source to
V system V
3.3 V system V
activate RESETIN.
uPSD34xx
SRAM STBY or I/O - PC2
CIRCUIT
BOARD
GENERAL I/O - PC3
GENERAL I/O - PC4
GENERAL I/O - PC7
DD
.
CC
TMS - PC0
TDO - PC6
TCK - PC1
.
TDI - PC5
RESETIN
DEBUG
Figure 91
shows recommended connections on a circuit board to a
100k
TEST POINT
OPTIONAL
GENERAL I/O
SIGNALS
CC
CC
pin on the JTAG connector should be connected to 5
RESET SOURCE
pin on the JTAG connector should be connected to
PUSH BUTTON
or ANY OTHER
typical
100k
10k
0.01
µF
CONN.
JTAG
TMS
TCK
TDI
TDO
V
GND
RST
CC
(1,2)
(3)
PSD module
Figure
JTAG
Programming
or Test
Equipment
Connects Here
259/300
AI10457
91.