UPSD3433E-40U6 STMicroelectronics, UPSD3433E-40U6 Datasheet - Page 32

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UPSD3433E-40U6

Manufacturer Part Number
UPSD3433E-40U6
Description
MCU 8BIT 8032 128KB FLASH 80TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet

Specifications of UPSD3433E-40U6

Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
For Use With
497-5518 - EVAL BOARD RFID READER497-5218 - KIT DEVELOPMENT FOR UPSD3400497-2381 - CABLE PROGRAMMER FLASH LINK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-4907

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Memory organization
4.2.1
4.2.2
Note:
4.2.3
32/300
Program memory
External program memory is addressed by the 8032 using its 16-bit program counter (PC)
and is accessed with the 8032 signal, PSEN. Program memory can be present at any
address in program space between 0000h and FFFFh.
After a power-up or reset, the 8032 begins program execution from location 0000h where
the reset vector is stored, causing a jump to an initialization routine in firmware. At address
0003h, just following the reset vector are the interrupt service locations. Each interrupt is
assigned a fixed interrupt service location in program memory. An interrupt causes the 8032
to jump to that service location, where it commences execution of the service routine.
External Interrupt 0 (EXINT0), for example, is assigned to service location 0003h. If EXINT0
is going to be used, its service routine must begin at location 0003h. Interrupt service
locations are spaced at 8-byte intervals: 0003h for EXINT0, 000Bh for Timer 0, 0013h for
EXINT1, and so forth. If an interrupt service routine is short enough, it can reside entirely
within the 8-byte interval. Longer service routines can use a jump instruction to somewhere
else in program memory.
Data memory
External data is referred to as XDATA and is addressed by the 8032 using Indirect
Addressing via its 16-bit data pointer register (DPTR) and is accessed by the 8032 signals,
RD and WR. XDATA can be present at any address in data space between 0000h and
FFFFh.
The UPSD34xx has dual data pointers (source and destination) making XDATA transfers
much more efficient.
Memory placement
PSD module architecture allows the placement of its external memories into different
combinations of program memory and data memory spaces. This means the main Flash,
the secondary Flash, and the SRAM can be viewed by the 8032 MCU in various
combinations of program memory or data memory as defined by PSDsoft Express.
As an example of this flexibility, for applications that require a great deal of Flash memory in
data space (large lookup tables or extended data recording), the larger main Flash memory
can be placed in data space and the smaller secondary Flash memory can be placed in
program space. The opposite can be realized for a different application if more Flash
memory is needed for code and less Flash memory for data.
By default, the SRAM and csiop memories on the PSD module must always reside in data
memory space and they are treated by the 8032 as XDATA.
The main Flash and secondary Flash memories may reside in program space, data space,
or both. These memory placement choices specified by PSDsoft Express are programmed
into non-volatile sections of the UPSD34xx, and are active at power-up and after reset. It is
possible to override these initial settings during runtime for In-Application Programming
(IAP).
Standard 8032 MCU architecture cannot write to its own program memory space to prevent
accidental corruption of firmware. However, this becomes an obstacle in typical 8032
systems when a remote update to firmware in Flash memory is required using IAP. The PSD
module provides a solution for remote updates by allowing 8032 firmware to temporarily
“reclassify” Flash memory to reside in data space during a remote update, then returning
Flash memory back to program space when finished. See the VM register
page
203) in the PSD module section of this document for more details.
UPSD3422, UPSD3433, UPSD3434, UPSD3454
(Table 160 on

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