UPSD3433E-40U6 STMicroelectronics, UPSD3433E-40U6 Datasheet - Page 31

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UPSD3433E-40U6

Manufacturer Part Number
UPSD3433E-40U6
Description
MCU 8BIT 8032 128KB FLASH 80TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet

Specifications of UPSD3433E-40U6

Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
For Use With
497-5518 - EVAL BOARD RFID READER497-5218 - KIT DEVELOPMENT FOR UPSD3400497-2381 - CABLE PROGRAMMER FLASH LINK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-4907

Available stocks

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Part Number
Manufacturer
Quantity
Price
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UPSD3433E-40U6
Manufacturer:
DENSO
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Manufacturer:
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0
UPSD3422, UPSD3433, UPSD3434, UPSD3454
4.1
4.1.1
4.1.2
4.1.3
4.2
Internal memory (MCU module, standard 8032 memory:
DATA, IDATA, SFR)
DATA memory
The first 128 bytes of internal SRAM ranging from address 0000h to 007Fh are called DATA,
which can be accessed using 8032 direct or indirect addressing schemes and are typically
used to store variables and stack.
Four register banks, each with 8 registers (R0 – R7), occupy addresses 0000h to 001Fh.
Only one of these four banks may be enabled at a time. The next 16 locations at 0020h to
002Fh contain 128 directly addressable bit locations that can be used as software flags.
SRAM locations 0030h and above may be used for variables and stack.
IDATA memory
The next 128 bytes of internal SRAM are named IDATA and range from address 0080h to
00FFh. IDATA can be accessed only through 8032 indirect addressing and is typically
used to hold the MCU stack as well as data variables. The stack can reside in both DATA
and IDATA memories and reach a size limited only by the available space in the combined
256 bytes of these two memories (since stack accesses are always done using indirect
addressing, the boundary between DATA and IDATA does not exist with regard to the stack).
SFR memory
Special function registers
they logically overlap the same 128 bytes as IDATA, ranging from address 0080h to 00FFh.
SFRs are accessed only using direct addressing. There 86 active registers used for many
functions: changing the operating mode of the 8032 MCU core, controlling 8032 peripherals,
controlling I/O, and managing interrupt functions. The remaining unused SFRs are reserved
and should not be accessed.
16 of the SFRs are both byte- and bit-addressable. Bit-addressable SFRs are those whose
address ends in “0” or “8” hex.
External memory (PSD module: program memory, data
memory)
The PSD module has four memories: main Flash, secondary Flash, SRAM, and csiop. See
the PSD MODULE section for more detailed information on these memories.
Memory mapping in the PSD module is implemented with the Decode PLD (DPLD) and
optionally the page register. The user specifies decode equations for individual segments of
each of the memories using the software tool PSDsoft Express. This is a very easy point-
and-click process allowing total flexibility in mapping memories. Additionally, each of the
memories may be placed in various combinations of 8032 program address space or 8032
data address space by using the software tool PSDsoft Express.
(Table 5 on page
42) occupy a separate physical memory, but
Memory organization
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