UPSD3433E-40U6 STMicroelectronics, UPSD3433E-40U6 Datasheet - Page 188

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UPSD3433E-40U6

Manufacturer Part Number
UPSD3433E-40U6
Description
MCU 8BIT 8032 128KB FLASH 80TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet

Specifications of UPSD3433E-40U6

Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
For Use With
497-5518 - EVAL BOARD RFID READER497-5218 - KIT DEVELOPMENT FOR UPSD3400497-2381 - CABLE PROGRAMMER FLASH LINK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-4907

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0
Programmable counter array (PCA) with PWM
188/300
Table 149. PCA0 register bit definition (continued)
Table 150. PCA1 control register PCACON1 (SFR 0BCh, reset value 00h)
Table 151. PCA1 register bit definition
Table 152. PCA status register PCASTA (SFR 0A5h, reset value 00h)
Table 153. PCASTA register bit definition
OVF1
Bit 7
Bit 7
1-0
1-0
Bit
Bit
Bit
3
2
6
5
4
3
2
7
6
10B_PWM
10B_PWM
CLK_SEL
CLK_SEL
PCAIDLE
EN_PCA
EN_PCA
Symbol
Symbol
Symbol
EOVFI
INTF5
INTF5
OFV1
Bit 6
Bit 6
[1:0]
[1:0]
Reserved
0 = Select 16-bit PWM
1 = Select 10-bit PWM
00 Select Prescaler clock as Counter clock
01 Select Timer 0 Overflow
10 Select External Clock pin (P4.3 for PCA0) (MAX clock rate = f
0 = PCA counter is disabled
1 = PCA counter is enabled
EN_PCA Counter Run Control Bit. Set with software to turn the PCA
counter on. Must be cleared with software to turn the PCA counter off.
1 = Enable Counter Overflow Interrupt if overflow flag (OVF) is set
0 = PCA operates when CPU is in Idle Mode
1 = PCA stops running when CPU is in Idle Mode
Reserved
0 = Select 16-bit PWM
1 = Select 10-bit PWM
00 Select Prescaler clock as Counter clock
01 Select Timer 0 Overflow
10 Select External Clock pin (P4.7 for PCA1) (MAX clock rate = f
PCA1 Counter OverFlow flag
Set by hardware when the counter rolls over. OVF1 flags an interrupt if Bit
EOVFI in PCACON1 is set. OVF1 may be set with either hardware or
software but can only be cleared with software.
TCM5 Interrupt flag
Set by hardware when a match or capture event occurs.
Must be clear with software.
EOVFI
INTF4
Bit 5
Bit 5
PCAIDLE
INTF3
Bit 4
Bit 4
UPSD3422, UPSD3433, UPSD3434, UPSD3454
OVF0
Bit 3
Bit 3
Function
Function
Function
INTF2
Bit 2
Bit 2
INTF1
Bit 1
Bit 1
CLK_SEL[1:0]
OSC
OSC
INTF0
Bit 0
Bit 0
/4)
/4)

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