MPC564CZP40 Freescale Semiconductor, MPC564CZP40 Datasheet - Page 415

• Manufacturer Part Number: MPC564CZP40
• Description: IC MPU 32BIT W/CODE COMP 388PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564CZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

In
Freescale Semiconductor
Figure
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Because ACS = 0, TRLX being set does not delay the assertion of the CS and WE strobes.
Because CSNT = 1, WE/BE is negated one clock cycle earlier than normal. (Refer to
CS is not negated one clock cycle earlier, since ACS = 00.
The total cycle length is three clock cycles, determined as follows:
— The basic memory cycle requires two clock cycles.
— One extra clock cycle is required due to the effect of TRLX on the negation of the WE/BE
Address
RD/WR
WE/BE
Figure 10-13. Relaxed Timing — Write Access (ACS = 11, SCY = 0, CSNT = 1, TRLX = 1)
Clock
10-14, notice the following:
Data
strobes.
OE
CS
TS
TA
MPC561/MPC563 Reference Manual, Rev. 1.2
ACS =11
ACS=00 & CSNT = 1
CSNT = 1
Memory Controller
Figure
10-8).
10-17