R8A77850ADBGV Renesas Electronics America, R8A77850ADBGV Datasheet - Page 1114

• Manufacturer Part Number: R8A77850ADBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

21. Serial Communication Interface with FIFO (SCIF)
Rev.1.00 Jan. 10, 2008 Page 1082 of 1658
REJ09B0261-0100
No
No
No
No
Figure 21.12 Sample Serial Reception Flowchart (2)
and ORER flag in SCLSR, to 0
Read receive data in SCFRDR
Clear DR, ER, BRK flags
Overrun error handling
Receive error handling
Break handling
Error handling
ORER = 1?
in SCFSR,
BRK = 1?
DR = 1?
ER = 1?
End
Yes
Yes
Yes
Yes
[1] Whether a framing error or parity error
[2] When a break signal is received,
has occurred in the receive data that
is to be read from SCFRDR can be
ascertained from the FER and PER
bits in SCFSR.
receive data (H'00) is not transferred
to SCFRDR.
However, note that the last data in
SCFRDR is H'00, and the break data
in which a framing error occurred is
stored.
When a break handling is completed
and a receive signal returns to 1, the
receive data transfer resumes.