R8A77850ADBGV Renesas Electronics America, R8A77850ADBGV Datasheet - Page 823

• Manufacturer Part Number: R8A77850ADBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

17.3.4
MSTPMR is a 32-bit readable register that indicates whether the PCIC/display unit
(DU)/DMAC/GDTA modules are in the module standby state. MSTPMR can be accessed only in
longword.
This register is initialized by a power-on reset by the PRESET pin, power-on reset by WDT
overflow, or H-UDI reset.
Initial value:
Initial value:
Bit
31 to 22 ⎯
21
20
19 to 6
R/W:
R/W:
BIt:
BIt:
Bit Name
MSTPMPCI
MSTPMDU
⎯
Standby Display Register (MSTPMR)
31
15
⎯
⎯
R
R
0
0
30
14
⎯
⎯
R
R
0
0
29
13
⎯
⎯
R
R
0
0
Initial
Value
All 0
x
x
All 0
28
12
⎯
⎯
R
R
0
0
27
⎯
11
⎯
R
R
R/W
R
R
R
R
0
0
26
10
⎯
⎯
R
R
0
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Module Stop Display Bit PCIC
Indicates the state of clock supply to the PCIC module
When a high level signal is input to the MODE12 pin,
the clock supply to the PCIC is stopped
0: PCIC operates (MODE12 pin: Low level)
1: PCIC stopped (MODE12 pin: High level)
Module Stop Display Bit DU
Indicates the state of clock supply to the DU module.
When a low level signal is input to the MODE12 or
MODE11 pin, the clock supply to the DU is stopped.
0: DU operates (MODE[12:11] pin: All High level)
1: DU stopped (MODE[12:11] pin: Not all High level)
Reserved
These bits are always read as 0. The write value
should always be 0.
25
⎯
⎯
R
R
0
9
0
24
⎯
⎯
R
R
0
8
0
23
⎯
⎯
R
R
0
7
0
Rev.1.00 Jan. 10, 2008 Page 791 of 1658
22
⎯
⎯
R
R
0
6
0
MSTPS
MSTP
MPCI
105
21
R
R
x
5
0
MSTPS
MSTP
MDU
104
20
R
R
x
4
0
17. Power-Down Mode
19
⎯
⎯
R
R
0
3
0
REJ09B0261-0100
18
⎯
⎯
R
R
0
2
0
17
⎯
⎯
R
R
0
1
0
MSTPS
16
100
⎯
R
R
0
0
0