R8A77850ADBGV Renesas Electronics America, R8A77850ADBGV Datasheet - Page 1156

• Manufacturer Part Number: R8A77850ADBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

22. Serial I/O with FIFO (SIOF)
Rev.1.00 Jan. 10, 2008 Page 1124 of 1658
REJ09B0261-0100
Bit
11 to 8
7
6
5, 4
3 to 0
Bit Name
TDLA[3:0]
TDRE
TLREP
—
TDRA[3:0]
Initial
Value
0000
0
0
All 0
0000
R/W
R/W
R/W
R/W
R
R/W
Description
Transmit Right-Channel Data Enable
Transmit Right-Channel Data Assigns 3 to 0
Transmit Left-Channel Data Assigns 3 to 0
These bits specify the position of left-channel data in a
transmit frame as B'0000 (0) to B'1110 (14).
1111: Setting prohibited
•
0: Disables right-channel data transmission
1: Enables right-channel data transmission
Transmit Left-Channel Repeat
0: Transmits data specified in the SITDR bit in SITDR
1: Repeatedly transmits data specified in the SITDL bit
•
•
Reserved
These bits are always read as 0. The write value should
always be 0.
These bits specify the position of right-channel data in a
transmit frame as B'0000 (0) to B'1110 (14).
1111: Setting prohibited
•
as right-channel data
in SITDR as right-channel data
Transmit data for the left channel is specified in the
SITDL bit in SITDR.
This bit setting is valid when the TDRE bit is set to
1.
When this bit is set to 1, the SITDR settings are
ignored.
Transmit data for the right channel is specified in the
SITDR bit in SITDR.