R8A77850ADBGV Renesas Electronics America, R8A77850ADBGV Datasheet - Page 1572

• Manufacturer Part Number: R8A77850ADBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

31. Register List
Rev.1.00 Jan. 10, 2008 Page 1540 of 1658
REJ09B0261-0100
Module
Name
DMAC
Name
DMA source address register B1
DMA destination address register B1 DARB1
DMA transfer count register B1
DMA source address register B2
DMA destination address register B2 DARB2
DMA transfer count register B2
DMA source address register B3
DMA destination address register B3 DARB3
DMA transfer count register B3
DMA extended resource selector 0
DMA extended resource selector 1
DMA extended resource selector 2
DMA source address register 6
DMA destination address register 6
DMA transfer count register 6
DMA channel control register 6
DMA source address register 7
DMA destination address register 7
DMA transfer count register 7
DMA channel control register 7
DMA source address register 8
DMA destination address register 8
DMA transfer count register 8
DMA channel control register 8
DMA source address register 9
DMA destination address register 9
DMA transfer count register 9
DMA channel control register 9
DMA operation register 1
Abbrev.
SARB1
TCRB1
SARB2
TCRB2
SARB3
TCRB3
DMARS0
DMARS1
DMARS2
SAR6
DAR6
TCR6
CHCR6
SAR7
DAR7
TCR7
CHCR7
SAR8
DAR8
TCR8
CHCR8
SAR9
DAR9
TCR9
CHCR9
DMAOR1
Power-on
Reset by
PRESET Pin/
WDT/H-UDI
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
H'0000
H'0000
H'0000
Undefined
Undefined
Undefined
H'4000 0000
Undefined
Undefined
Undefined
H'4000 0000
Undefined
Undefined
Undefined
H'4000 0000
Undefined
Undefined
Undefined
H'4000 0000
H'0000
Manual Reset
by
WDT/Multiple
Exception
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
H'0000
H'0000
H'0000
Undefined
Undefined
Undefined
H'4000 0000
Undefined
Undefined
Undefined
H'4000 0000
Undefined
Undefined
Undefined
H'4000 0000
Undefined
Undefined
Undefined
H'4000 0000
H'0000
Sleep/
Deep Sleep by
SLEEP
Instruction
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Module
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained