R8A77850ADBGV Renesas Electronics America, R8A77850ADBGV Datasheet - Page 1149

• Manufacturer Part Number: R8A77850ADBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Bit
1
0
Bit Name
RFUDF
RFOVF
Initial
Value
0
0
R/W
R/W
R/W
Description
Receive FIFO Underflow
0: Indicates that no receive FIFO underflow occurs
1: Indicates that a receive FIFO underflow occurs
A receive FIFO underflow means that reading of SIRDR
has occurred when the receive FIFO is empty.
When a receive FIFO underflow occurs, the value of
data read from SIRDR is not guaranteed.
•
•
•
Receive FIFO Overflow
0: Indicates that no receive FIFO overflow occurs
1: Indicates a receive FIFO overflow occurs
A receive FIFO overflow means that writing has
occurred when the receive FIFO is full.
When a receive FIFO overflow occurs, the SIOF
indicates overflow, and receive data is lost.
•
•
•
This bit is valid when the RXE bit in SICTR is 1.
When 1 is written to this bit, the contents are
cleared. Writing 0 to this bit is invalid.
To enable the issuance of this interrupt source, set
the RFUDFE bit in SIIER is set to 1.
This bit is valid when the RXE bit in SICTR is 1.
When 1 is written to this bit, the contents are
cleared. Writing 0 to this bit is invalid.
To enable the issuance of this interrupt source, set
the RFOVFE bit in SIIER is set to 1.
Rev.1.00 Jan. 10, 2008 Page 1117 of 1658
22. Serial I/O with FIFO (SIOF)
REJ09B0261-0100