IPR-PCIE/1 Altera, IPR-PCIE/1 Datasheet - Page 100

• Manufacturer Part Number: IPR-PCIE/1
• Description: IP CORE Renewal Of IP-PCIE/1
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/1

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x1 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

5–16
Table 5–4. 64-, 128-, or 256-Bit Avalon-ST TX Datapath (Part 4 of 5)
PCI Express Compiler User Guide
tx_cred_fc_conship
tx_cred_fc_infinite
tx_cred_hdr_fc_p
tx_cred_data_fc_p
tx_cred_hdr_fc_np
tx_cred_data_fc_np
tx_cred_hdr_fc_cp
tx_st_parity
Signal
6
6
8
12
8
12
8
8, 16
31
Width Dir
Component Specific Signals for Stratix V
O
O
O
O
O
O
O
o
component
specific
component
specific
component
specific
component
specific
component
specific
component
specific
component
specific
component
specific
Avalon-ST
Type
Asserted for 1 cycle each time the IP core consumes a
credit. The 6 bits of this vector correspond to the
following 6 types of credit types:
■
■
■
■
■
■
During a single cycle, the IP core can consume either a
single header credit or both a header and data credit.
When asserted Indicates that the corresponding credit
type has infinite credits available and does not need to
calculate credit limits. The 6 bits of this vector
correspond to the following 6 types of credit types:
■
■
■
■
■
■
Header credit limit for the FC posted writes. Each credit is
20 bytes.
Data credit limit for the FC posted writes. Each credit is
16 bytes.
Header limit for the non-posted requests. Each credit is
20 bytes.
Data credit limit for the non-posted requests. Each credit
is 16 bytes.
Header credit limit for the FC completions. Each credit is
20 bytes.
Generates even parity on the entire TLP when parity is
enabled. Available for Stratix V GX devices only.
[5]–posted headers
[4]–posted data
[3]–non-posted header
[2]–non-posted data
[1]–completion header
[0]–completion data
[5]–posted headers
[4]–posted data
[3]–non-posted header
[2]–non-posted data
[1]–completion header
[0]–completion data
Description
December 2010 Altera Corporation
Chapter 5: IP Core Interfaces
Avalon-ST Interface