IPR-PCIE/1 Altera, IPR-PCIE/1 Datasheet - Page 359

• Manufacturer Part Number: IPR-PCIE/1
• Description: IP CORE Renewal Of IP-PCIE/1
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/1

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x1 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Additional Information
Revision History
December 2010 Altera Corporation
October 2005
October 2005
October 2005
June 2005
April 2006
June 2005
April 2006
June 2005
April 2006
April 2006
June 2005
December
December
December
December
May 2007
May 2007
May 2007
May 2007
2006
2006
2006
Date
Version
2.1.0
2.0.0
1.0.0
2.1.0
2.0.0
1.0.0
2.1.0
2.1.0
2.0.0
1.0.0
1.0.0
7.1
6.1
7.1
6.1
7.1
6.1
7.1
6.1
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First release.
Added SOPC Builder Design Flow walkthrough.
Revised MegaWizard Plug-In Manager Design Flow walkthrough.
Updated screen shots and version numbers.
Modified text to accommodate new MegaWizard interface.
Updated installation diagram.
Updated walkthrough to accommodate new MegaWizard interface.
Updated screen shots and version numbers.
Added steps for sourcing Tcl constraint file during compilation to the walkthrough in the
section.
Moved installation information to release notes.
Updated screen shots and version numbers.
First release.
Added sections relating to SOPC Builder.
Updated screen shots and parameters for new MegaWizard interface.
Corrected timing diagrams.
Added section
Updated screen shots and version numbers.
Updated System Settings, Capabilities, Buffer Setup, and Power Management Pages and
their parameters.
Added three waveform diagrams:
Transfer for a single write.
Transaction layer not ready to accept packet.
Transfer with wait state inserted for a single DWORD.
Updated screen shots and version numbers.
First release.
Made minor edits and corrected formatting.
Modified file names to accommodate new project directory structure.
Added references for high performance, Chaining DMA Example.
New chapter
Added Incremental Compile Module (ICM) section.
Added high performance, Chaining DMA Example.
Updated chapter number to chapter 5.
Added section.
Added two BFM Read/Write Procedures:
ebfm_start_perf_sample
ebfm_disp_perf_sample
Updated screen shots and version numbers.
First release.
Chapter 14, External PHYs
Chapter 11, Flow
Procedure
Procedure
Control.
Changes Made
added for external PHY support.
PCI Express Compiler User Guide
Info–7
SPR