PIC18F67K22-I/MR Microchip Technology, PIC18F67K22-I/MR Datasheet - Page 22

• Manufacturer Part Number: PIC18F67K22-I/MR
• Description: 128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, GP 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F67K22-I/MR

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
TABLE 1-3:
DS39960D-page 22
RG0/ECCP3/P3A
RG1/TX2/CK2/AN19/
C3OUT
RG2/RX2/DT2/AN18/
C3INA
RG3/CCP4/AN17/P3D/
C3INB
RG4/RTCC/T7CKI/T5G/
CCP5/AN16/P1D/C3INC
RG5
Legend: TTL = TTL compatible input
Note 1:
RG0
ECCP3
P3A
RG1
TX2
CK2
AN19
C3OUT
RG2
RX2
DT2
AN18
C3INA
RG3
CCP4
AN17
P3D
C3INB
RG4
RTCC
T7CKI
T5G
CCP5
AN16
P1D
C3INC
2:
3:
4:
Pin Name
(3)
ST = Schmitt Trigger input with CMOS levels
I
P
I
Default assignment for ECCP2 when the CCP2MX Configuration bit is set.
Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
Not available on PIC18F65K22 and PIC18F85K22 devices.
The CC6, CCP7, CCP8 and CCP9 pin placement depends on the setting of the ECCPMX Configuration bit
(CONFIG3H<1>).
2
C = I
= Input
= Power
PIC18F6XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
2
C™/SMBus
Pin Number Pin
QFN/TQFP
3
4
5
6
8
7
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Buffer
Type
S/T
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
—
—
—
PORTG is a bidirectional I/O port.
See the MCLR/RG5 pin.
Digital I/O.
Capture 3 input/Compare 3 output/PWM3 output.
ECCP3 PWM Output A.
Digital I/O.
EUSART asynchronous transmit.
EUSART synchronous clock (see related RX2/DT2).
Analog Input 19.
Comparator 3 output.
Digital I/O.
EUSART asynchronous receive.
EUSART synchronous data (see related TX2/CK2).
Analog Input 18.
Comparator 3 Input A.
Digital I/O.
Capture 4 input/Compare 4 output/PWM4 output.
Analog Input 18.
ECCP3 PWM Output D.
Comparator 3 Input B.
Digital I/O.
RTCC output
Timer7 clock input.
Timer5 external clock gate input.
Capture 5 input/Compare 5 output/PWM5 output.
Analog Input 16.
ECCP1 PWM Output D.
Comparator 3 Input C.
CMOS = CMOS compatible input or output
Analog = Analog input
O
OD
= Output
= Open-Drain (no P diode to V
Description
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DD
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