PIC18F67K22-I/MR Microchip Technology, PIC18F67K22-I/MR Datasheet - Page 401

• Manufacturer Part Number: PIC18F67K22-I/MR
• Description: 128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, GP 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F67K22-I/MR

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

27.9
27.9.1
When the device enters any Sleep mode, the CTMU
module current source is always disabled. If the CTMU
is performing an operation that depends on the current
source when Sleep mode is invoked, the operation may
not
measurements may return erroneous values.
27.9.2
The behavior of the CTMU in Idle mode is determined
by the CTMUSIDL bit (CTMUCONH<5>). If CTMUSIDL
is cleared, the module will continue to operate in Idle
mode. If CTMUSIDL is set, the module’s current source
is disabled when the device enters Idle mode. In this
case, if the module is performing an operation when
Idle mode is invoked, the results will be similar to those
with Sleep mode.
TABLE 27-1:
 2009-2011 Microchip Technology Inc.
CTMUCONH
CTMUCONL
CTMUICON
PIR3
PIE3
IPR3
Legend:
Name
terminate
Operation During Sleep/Idle Modes
— = unimplemented, read as ‘ 0 ’. Shaded cells are not used during ECCP operation.
SLEEP MODE
IDLE MODE
EDG2POL
TMR5GIF
TMR5GIE
TMR5GIP
CTMUEN
ITRIM5
correctly.
Bit 7
REGISTERS ASSOCIATED WITH CTMU MODULE
EDG2SEL1
Capacitance
ITRIM4
Bit 6
—
—
—
—
EDG2SEL0
CTMUSIDL
ITRIM3
RC2IF
RC2IE
RC2IP
and
Bit 5
time
EDG1POL
ITRIM2
TX2IF
TX2IE
TX2IP
TGEN
Bit 4
PIC18F87K22 FAMILY
27.10 Effects of a Reset on CTMU
Upon Reset, all registers of the CTMU are cleared. This
disables the CTMU module, turns off its current source
and returns all configuration options to their default set-
tings. The module needs to be re-initialized following
any Reset.
If the CTMU is in the process of taking a measurement
at the time of Reset, the measurement will be lost. A
partial charge may exist on the circuit that was being
measured, which should be properly discharged before
the CTMU makes subsequent attempts to make a
measurement. The circuit is discharged by setting and
clearing the IDISSEN bit (CTMUCONH<1>) while the
A/D Converter is connected to the appropriate channel.
EDG1SEL1
CTMUIF
CTMUIE
CTMUIP
EDGEN
ITRIM1
Bit 3
EDGSEQEN
EDG1SEL0
CCP2IF
CCP2IE
CCP2IP
ITRIM0
Bit 2
EDG2STAT
IDISSEN
CCP1IE
CCP1IP
CCP1IF
IRNG1
Bit 1
DS39960D-page 401
EDG1STAT
RTCCIF
RTCCIE
RTCCIP
CTTRIG
IRNG0
Bit 0